/*
* Modified f_usr for the June 2022 pocket detector tests.
* 1x pad detector, 1x 60x40 DSSD, 5x pad detctor, 1x scint+SiPD
*
* 1 DAQ computer
* 1 FEBEX crate connected to SFP1
* 5 FEBEX cards in crate
* 16 channels active on each card
*
* C. Griffin and G. Leckenby
*
* cgriffin@triumf.ca and gleckenby@triumf.ca
*
*/
// N.Kurz, EE, GSI, 3-Feb-2010
// N.Kurz, EE, GSI, 28-Oct-2020: USE_KINPEX_V5 activates new functions added to the kinpex firmware
// version 5.0 by S.Minami. reduces number of accesses to KINPEX register
// during token readout.
// pexor febex triggered readout
//----------------------------------------------------------------------------
// User change area: comment with // if #defines below shall be switched off
//#define USE_MBSPEX_LIB 1 // this define will switch on usage of mbspex lib with locked ioctls
// instead of direct register mapping usage
//#define WR_TIME_STAMP 1 // white rabbit latched time stamp
#define USE_KINPEX_V5 1
#define WRITE_ANALYSIS_PARAM 1
//#define LVDS_OUT 1
#define DEBUG 1
#ifdef WR_TIME_STAMP
#define USE_TLU_FINE_TIME 1
//#define WR_USE_TLU_DIRECT 1 // N.Kurz, 29-Oct-2020: ist langsamer als etherbone readout ???!!!
#endif
//----------------------------------------------------------------------------
#include "stdio.h"
#include "s_veshe.h"
#include "stdarg.h"
#include <sys/file.h>
#ifndef Linux
#include <mem.h>
#include <smem.h>
#else
#include "smem_mbs.h"
#include <unistd.h>
#include <stdlib.h>
#include <string.h>
#include <sys/mman.h>
#endif
#include "sbs_def.h"
#include "error_mac.h"
#include "errnum_def.h"
#include "err_mask_def.h"
#include "f_ut_printm.h"
#include "f_user_trig_clear.h"
#include "./pexor_gosip.h"
#ifdef USE_MBSPEX_LIB
#include "mbspex/libmbspex.h"
#endif
#ifdef WR_TIME_STAMP
#include <etherbone.h>
#include <gsi_tm_latch.h> // wishbone devices
#endif // WR_TIME_STAMP
//----------------------------------------------------------------------------
// User change area:
#define MAX_SFP 4
#define MAX_SLAVE 16
#define FEBEX_CH 16
// nr of slaves on SFP 0 1 2 3
// | | | |
#define NR_SLAVES { 0, 5, 0, 0} //*\*/*\*/*\*/*\*/*\*/ DEFINE NUMBER OF CARDS USED IN FEBEX CRATE \*/*\*/*\*/*\*/*\*/*\*//
// maximum trace length 8000 (133 us)
// attention
// CVT to set: trace length - irq latency (10us)
#define FEB_TRACE_LEN 3000 // in nr of samples
#define FEB_TRIG_DELAY 200 // in nr.of samples
//#define FEB_TRACE_LEN 200 // in nr of samples
//#define FEB_TRIG_DELAY 100 // in nr.of samples
//#define CLK_SOURCE_ID {0xff,0} // sfp_port, module_id of the module to distribute clock
#define CLK_SOURCE_ID {0x0,0} // sfp_port, module_id of the module to distribute clock
//--------------------------------------------------------------------------------------------------------
#define DATA_FILT_CONTROL_REG 0x2080C0
#define DATA_FILT_CONTROL_DAT 0x84 // (0x80 E,t summary always + data trace always (contingent on sparsifying)
// (0x82 E,t summery always + (data trace + filter trace) always
// (0x84 E,t summery always + data trace if > 1 hit (supercedes sparsifying for >1 hit)
// (0x86 E,t summery always + (data trace + filter trace) if > 1 hit
// Trigger/Hit finder filter
#define TRIG_SUM_A_REG 0x2080D0
#define TRIG_GAP_REG 0x2080E0
#define TRIG_SUM_B_REG 0x2080F0
#define TRIG_SUM_A 8 // for 12 bit: 8, 4 ,9 (8+1); for 14 bit: 14, 4, 15 (14 + 1).
#define TRIG_GAP 4
#define TRIG_SUM_B 9 // 8 + 1: one has to be added.
// Energy Filters and Modes
#define ENABLE_ENERGY_FILTER 1
#define TRAPEZ 1 // if TRAPEZ is off, MWD will be activated
#ifdef ENABLE_ENERGY_FILTER
#ifdef TRAPEZ
#define ENERGY_SUM_A_REG 0x208090
#define ENERGY_GAP_REG 0x2080A0
#define ENERGY_SUM_B_REG 0x2080B0
#define ENERGY_SUM_A 15
#define ENERGY_GAP 5
#define ENERGY_SUM_B 16 // 64 + 1: one has to be added.
#endif
#endif
//--------------------------------------------------------------------------------------------------------
//
// bit 31 12 bit adc: 0
// 14 bit adc: 1
//
// bit 28 signal polarity: 0: positive, <-- very important info for fpga hit finder!
// 1: negative <-- "
// bit 24 - 27 trigger methode: 0: 3step
// 1: 2-window 60 MHz
// 2: 2-window 30 MHz
// 4: 2-window 15 MHz
// 8: 2-window 7.5 MHz
// bit 20 even-odd or 0: disabled
// 1: enabled
// bit 0 - 16 disable channels: bit 0: special channel, bit 1-16: adc channels
// 0x00000: all enabled
// 0x1fffe: all adc channels disabled, special channel enabled
//--------------------------------------------------------------------------------------------------------
static long l_sfp0_feb_ctrl0[MAX_SLAVE] = { 0x01000000, 0x01000000, 0x01000000, 0x01000000, //Not used
0x01000000, 0x01000000, 0x01000000, 0x01000000,
0x01000000, 0x01000000, 0x01000000, 0x01000000,
0x01000000, 0x01000000, 0x01000000, 0x01000000 };
static long l_sfp1_feb_ctrl0[MAX_SLAVE] = { 0x91000000, 0x91000000, 0x91000000, 0x91000000,
0x81000000, //Only first five used
0x91000000, 0x91000000, 0x92000000,
0x92000000, 0x92000000, 0x92000000, 0x92000000,
0x92000000, 0x92000000, 0x92000000, 0x92000000 };
static long l_sfp2_feb_ctrl0[MAX_SLAVE] = { 0x81000000, 0x81000000, 0x81000000, 0x81000000, //Not used
0x81000000, 0x81000000, 0x81000000, 0x81000000,
0x81000000, 0x81000000, 0x01000000, 0x01000000,
0x81000000, 0x81000000, 0x81000000, 0x81000000 };
static long l_sfp3_feb_ctrl0[MAX_SLAVE] = { 0x01000000, 0x01000000, 0x01000000, 0x01000000, //Not used
0x01000000, 0x01000000, 0x01000000, 0x01000000,
0x01000000, 0x01000000, 0x01000000, 0x01000000,
0x01000000, 0x01000000, 0x01000000, 0x01000000 };
//--------------------------------------------------------------------------------------------------------
//--------------------------------------------------------------------------------------------------------
// bit 0 - 16 data sparsifying: bit 0: special channel, bit 1-16: adc channels
// 0x00000: sparsifying disabled for all channles
// 0x1fffe: sparsifying for all adc channels enabled
// sparcifying for special channel disabled
//--------------------------------------------------------------------------------------------------------
static long l_sfp0_feb_ctrl1[MAX_SLAVE] = { 0x00000, 0x1fffe, 0x1ff0e, 0x10ffe, //Not used
0x1effe, 0x1fffe, 0x1fffe, 0x1fffe,
0x1fffe, 0x1ff7e, 0x1fffe, 0x1fffe,
0x1effe, 0x1fffe, 0x1fffe, 0x1fffe };
static long l_sfp1_feb_ctrl1[MAX_SLAVE] = { 0x1fffe, 0x1fffe, 0x1fffe, 0x1fffe,
0x1fffe, //Only first five used
0x00000, 0x1fbfe, 0x1fefe,
0x1fefe, 0x1ff7e, 0x1ffbe, 0x1ffee,
0x00000, 0x00000, 0x00000, 0x00000 };
static long l_sfp2_feb_ctrl1[MAX_SLAVE] = { 0x00000, 0x00000, 0x00000, 0x00000, //Not used
0x00000, 0x00000, 0x00000, 0x00000,
0x1ffff, 0x1ffff, 0x1ffff, 0x1ffff,
0x1ffff, 0x1ffff, 0x1ffff, 0x1ffff };
static long l_sfp3_feb_ctrl1[MAX_SLAVE] = { 0x0, 0x1ffff, 0x1ffff, 0x1ffff, //Not used
0x1ffff, 0x1ffff, 0x1ffff, 0x1ffff,
0x1ffff, 0x1ffff, 0x1ffff, 0x1ffff,
0x1ffff, 0x1ffff, 0x1ffff, 0x1ffff };
//--------------------------------------------------------------------------------------------------------
//--------------------------------------------------------------------------------------------------------
// bit 0 - 15 internal trigger enable/disable for aadc channels 0-15
// 0x0000: trigger disabled for all adc channels
// 0xffff: trigger enabled for all adc channels
//--------------------------------------------------------------------------------------------------------
static long l_sfp0_feb_ctrl2[MAX_SLAVE] = { 0xffff, 0xffff, 0xffff, 0xffff, //Not used
0xffff, 0xffff, 0xffff, 0xffff,
0xffff, 0xffff, 0xffff, 0xffff,
0xffff, 0xffff, 0xffff, 0xffff };
static long l_sfp1_feb_ctrl2[MAX_SLAVE] = { 0xef00, 0x0000, 0x00ef, 0x00ef, //OR of pads 2, 4, and 6 + PD front and back
0xc02a, //Only first five used
0xffff, 0xffff, 0xffff,
0xffff, 0xffff, 0xffff, 0xffff,
0xffff, 0xffff, 0xffff, 0xffff };
static long l_sfp2_feb_ctrl2[MAX_SLAVE] = { 0xffff, 0xffff, 0xffff, 0xffff, //Not used
0xffff, 0xffff, 0xffff, 0xffff,
0xffff, 0xffff, 0xffff, 0xffff,
0xffff, 0xffff, 0xffff, 0xffff };
static long l_sfp3_feb_ctrl2[MAX_SLAVE] = { 0xffff, 0xffff, 0xffff, 0xffff, //Not used
0xffff, 0xffff, 0xffff, 0xffff,
0xffff, 0xffff, 0xffff, 0xffff,
0xffff, 0xffff, 0xffff, 0xffff };
//--------------------------------------------------------------------------------------------------------
//--------------------------------------------------------------------------------------------------------
// max: 255 (adc counts)
static long l_sfp0_thresh[MAX_SLAVE][FEBEX_CH] = { //Not used
// channel 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
/* FEBEX 0 */ { 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff },
/* FEBEX 1 */ { 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff },
/* FEBEX 2 */ { 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff },
/* FEBEX 3 */ { 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff },
/* FEBEX 4 */ { 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff },
/* FEBEX 5 */ { 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff },
/* FEBEX 6 */ { 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff },
/* FEBEX 7 */ { 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff },
/* FEBEX 8 */ { 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff },
/* FEBEX 9 */ { 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff },
/* FEBEX 10 */ { 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff },
/* FEBEX 11 */ { 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff },
/* FEBEX 12 */ { 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff },
/* FEBEX 13 */ { 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff },
/* FEBEX 14 */ { 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff },
/* FEBEX 15 */ { 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff } };
// max: 255 (adc counts)
static long l_sfp1_thresh[MAX_SLAVE][FEBEX_CH] = {
// channel 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
/* FEBEX 0 */ { 0x85f, 0x85f, 0x85f, 0x85f, 0x85f, 0x85f, 0x85f, 0x85f, 0x85f, 0x85f, 0x85f, 0x85f, 0x85f, 0x85f, 0x85f, 0x85f },
/* FEBEX 1 */ { 0x85f, 0x85f, 0x85f, 0x85f, 0x85f, 0x85f, 0x85f, 0x85f, 0x85f, 0x85f, 0x85f, 0x85f, 0x85f, 0x85f, 0x85f, 0x85f },
/* FEBEX 2 */ { 0x85f, 0x85f, 0x85f, 0x85f, 0x85f, 0x85f, 0x85f, 0x85f, 0x85f, 0x85f, 0x85f, 0x85f, 0x85f, 0x85f, 0x85f, 0x85f },
/* FEBEX 3 */ { 0x85f, 0x85f, 0x85f, 0x85f, 0x85f, 0x85f, 0x85f, 0x85f, 0x85f, 0x85f, 0x85f, 0x85f, 0x85f, 0x85f, 0x85f, 0x85f },
/* FEBEX 4 */ { 0x85f, 0x85f, 0x85f, 0x85f, 0x85f, 0x85f, 0x85f, 0x85f, 0x85f, 0x85f, 0x85f, 0x85f, 0x85f, 0x85f, 0x85f, 0x85f },
/* FEBEX 5 */ { 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff }, //Not used
/* FEBEX 6 */ { 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff }, //Not used
/* FEBEX 7 */ { 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff }, //Not used
/* FEBEX 8 */ { 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff }, //Not used
/* FEBEX 9 */ { 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff }, //Not used
/* FEBEX 10 */ { 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff }, //Not used
/* FEBEX 11 */ { 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff }, //Not used
/* FEBEX 12 */ { 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff }, //Not used
/* FEBEX 13 */ { 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff }, //Not used
/* FEBEX 14 */ { 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff }, //Not used
/* FEBEX 15 */ { 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff } }; //Not used
// max: 255 (adc counts)
static long l_sfp2_thresh[MAX_SLAVE][FEBEX_CH] = { //Not used
// channel 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
/* FEBEX 0 */ { 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff },
/* FEBEX 1 */ { 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff },
/* FEBEX 2 */ { 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff },
/* FEBEX 3 */ { 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff },
/* FEBEX 4 */ { 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff },
/* FEBEX 5 */ { 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff },
/* FEBEX 6 */ { 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff },
/* FEBEX 7 */ { 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff },
/* FEBEX 8 */ { 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff },
/* FEBEX 9 */ { 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff },
/* FEBEX 10 */ { 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff },
/* FEBEX 11 */ { 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff },
/* FEBEX 12 */ { 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff },
/* FEBEX 13 */ { 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff },
/* FEBEX 14 */ { 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff },
/* FEBEX 15 */ { 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff } };
// max: 255 (adc counts)
static long l_sfp3_thresh[MAX_SLAVE][FEBEX_CH] = { //Not used
// channel 0 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15
/* FEBEX 0 */ { 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff },
/* FEBEX 1 */ { 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff },
/* FEBEX 2 */ { 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff },
/* FEBEX 3 */ { 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff, 0x1ff },
... 2280 more lines ...
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