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| LIBELLE 2025 |
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Message ID: 63
Entry time: Thu May 15 00:45:19 2025
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| Author: |
Carsten |
| Category: |
DAQ |
| Subject: |
DRALS preliminary timing settings (DR part) |
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DAC control on sadpc115
- Total measurement window: 600 001 ms (10 min + 1ms)
- COOL: 16800 us
- MEAS0 / MEAS1 : 16800us
- Ramp phase delay: 3000 us
- Voltage MEAS0 (MAX of F=4 Peak) : 3348V
- Voltage MEAS1 (MAX of F=4 Peak) : 3243V
- Voltage COOL: -900V
SubTriggers
[1] 5500 us
[2] 2000 us
[3] 2200 us
[4] 2400 us
[5] 200 us (not connected)
[6] 200 us (not connected)
[7] 200 us (not connected)
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