CRATE("Master")
{
	GSI_VULOM(0x05000000) {
		trlo2_master = true
	}
	MESYTEC_MADC32(0x00500000) {
#		  nim_busy = gate0
#   	          range = 10 V
#		  resolution=8
#		  hires=true
	}
	BARRIER
	CAEN_V775 (0x00A00000) {
		  common_start = false
		  time_range = 1200 ns
		  suppress_invalid = true
		  suppress_over_range = true
	}
	BARRIER
        CAEN_V830 (0x00E00000) {
		  resolution = 32	
        }
	BARRIER
	MESYTEC_MDPP16SCP (0x00200000) {
	 	  auto_pedestals = false
		  # index 0: ADC resolution -> 0: 16 bit ... 4: 12 bit
		  # index 1: TDC resolution -> 0: 24 ps  ... 5: 781 ps
		  resolution = (0, 0)
		  blt_mode = noblt  

		  # true = first single hit.
		  # false = all hits within window.
		  only_first_hit = false

		  # Monitor settings (outputs are NIM2 and NIM3)
		  # Switch monitor on(1) or off(0)
		  monitor_on = 1
		  # Select monitor channel [0..15]
		  monitor_channel = 0
		  # Select monitor waveform
		  # 0: preamp + trigger out
		  # 1: energy shaped signal + timing filter signal
		  # 2: energy shaped signal x 32 + reconstructed baseline
		  # 3: baseline restored signal + timing filter signal
		  monitor_wave = 0

		  # NIM input options
		  # NIM 0: 0 = Off, 1 = Cbus, 4 = Busy out (full), 8 = data thr, 9 = event thr
		  # NIM 1: always trigger output
		  # NIM 2: 0 = Off, 1 = Trigger 1 In, 2 = Reset In
		  # NIM 3: 0,1 = Off, 2 = Sync In (need to set ts_source to external)
		  # NIM 4: 0 = Off, 1 = Trigger 0 In
		  nim = (1 {5})
		  # ECL input options
		  # ECL 0: 0 = Off, 4 = Busy Out, 8 = data threshold, 9 = event threshold
		  # ECL 1: 0 = Off, 1 = Reset In
		  #      + 0 = Terminated, + 16 = Unterminated
		  # ECL 2: 0 = Off, 1 = Sync In, 2 = Trigger 1 In
		  #      + 0 = Terminated, + 16 = Unterminated
		  # ECL 3: 0 = Off, 1 = Trigger 0 In
		  #      + 0 = Terminated, + 16 = Unterminated
		  ecl = (0 {4})
		  # Window ranges:
		  # time_after_trigger: [-25.56 us .. +25.56 us]
		  # width: [0 .. 25.56 us]
		  GATE {
		  	time_after_trigger = -25ns
			width = 1us
		  }

	}		
}