We now have a drasi DAQ running for our (p,g) experiments.
The RIO we have it installed right now is: r4l-58
It shall be used with the user <litv-exp>

The DAQ-controle shall be done from lxg1275 inside a SCREEN SESSION named "daq"
tab 0 >> drasi 
tab 1 >> logger
tab 2 >> rate
tab 3 >> stream server
tab 4 >> file writing (optional)

To check and control running daq:

login on lxg1275
> ssh litv-exp@lxg1275

enter screen session
> screen -x daq

DRASI
go to tab 0
> ctrl-a 0 
should be quite, no errors showing, no terminal outputs
full restart proceedure
> ssh r4l-58
> cd esrdaq_2018/r4l-58
> ./start.sh (for det. triggered daq)
> ./pulser.sh (for internal pulser trigger)
> ctrl-c (for killing daq)

LOGGER
go to tab 1
> ctrl-a 1
should be quite, no errors showing, no terminal outputs
full restart proceedure
> ssh r4l-58
> cd esrdaq_2018/r4l-58
> ./logger.sh

RATE MONITOR
go to tab 2
> ctrl-a 2
rates should update each second
"incr" should be event rate per sec 
"send" column should be reasonable value if data is written
full restart proceedure
> ssh r4l-58
> cd esrdaq_2018/r4l-58
> ./rate.sh

EMPTY STREAM SERVER
go to tab 3
> ctrl-a 3 
empty stream should be running  
number of processed events should keep increasing
you should see the number of clients connected
full restart proceedure (on lxg1275)
> empty stream://r4l-58 --server=stream:6002

WRITE A FILE
can be done by litv-exp from any lgx-machine
ROOT FILE:
> e127_unpack --stream=lxg1275 --ntuple=RAW,/data.local1/e127/pre_data/file.root
LMD FILE:
> e127_unpack --stream=lxg1275 --output=/data.local1/e127/pre_data/test.lmd
COMMENT: better use a transport server for reliable data writing: https://elog.gsi.de/esr/NucAR+lab/2

TRANSPORT SERVER
> for writing lmd files

the transport servers provided by ucesb are made for reliable data writing. This means the will not miss any
data processed by the daq, but the data taking of the daq will be limited by the writing speed.

STREAM SERVER
> for online/quick check

the stream is able to neglect events which the client cannot process fast enough. So events/data will be missing
if writing is slower than data taking. This is good for online monitors etc.

with the DRASI environment one can interact with the vulom 

Attached are all downloads available for the DT1419ET from CAEN on 29.10.19.

Using this commands i made an image of an sd card of the epics_pi_v0:

sudo dd bs=4M if=/dev/mmcblk0 | gzip > /home/litv-exp/slow_control/sd_card_backups/epics_pi_v0.gz

To make clones of the sd card use the command:

sudo gzip -dc /home/litv-exp/slow_control/sd_card_backups/epics_pi_v0.gz | dd bs=4M of=/dev/mmcblk0

This was done on astrum1 laptop (ATPNBG004).

Here is a brief description of how to change the VME hardware of an exisiting DAQ system to a new configuration.

Our DAQ folders are located in /lynx/Lynx/esr/usr/litv-exp/

The current DAQ running on a specific rio4 is always located in a subfolder named as the hostname of the rio4, e.g. r4l-58.

If you want to change the DAQ on this rio you have to change the config in this folder. Be aware, that the folder name HAS TO BE THE HOSTNAME, no exeptions are allowed! Because of this the r4l-XX folders are usually softlinks to further folders, that contain different versions of the DAQ. 
In practice this means:

1. copy the current folder (e.g. r4l-58_dev) to a new one (e.g. r4l-58_new) and make sure that the link (r4l-58) is set to your new folder (ln -s /../r4l-58_new /../r4l-58)

2. change the hardware of your VME crate and check all VME addresses

3. edit main.cfg in your new DAQ folder, see the example attached here
   - always have a BARRIER between the modules
   - make sure you get the VME addresses right (MesyTec, CAEN board specialties)
   - the order of the modules in this file from top to bottom is important for the next step!

4. edit your start.sh script and all connected scripts and config-files (trloii_setup.sh, vulom.trlo..., a dedicated entry for vulom-configuration will follow)
   - check if DAQ in running, when triggers are provided

5. set up a new unpacker
   -go to the unpacker directory /u/litv-exp/unpacker/unpackexps/ and copy the old unpacker to a new directory:  
   -> cp -r old_up new_up
   -rename the main .spec file:
   -> cd new_up
   -> mv old_up.spec new_up.spec
   -open the Makefile with editor, search and replace "old_up" by "new_up", try compiling:
   -> make clean
   -> make -j

6. configure the data structure of the unpacker
   -make sure you have all the module spec-files that you need included in "new_up.spec", check nurdlib or Hans Törnqvist/Basti Löher in case you do not have it
   -edit the "main_user_esr.spec" to include all your modules (see example attached)
   -the (geom=0x1) field of each module has to be numbered according to the module order in the main.cfg above, starting from 0x1, some modules require additional things (crate=0)
   -edit the "det_mapping.hh" to assign names and types for each channel (example attached)
   -recompile and check upacker with running data stream from the daq:
   -> make -j
   -> ./new_up --stream=r4l-58 --debug (will print only error events)

The PicoScope is currently connected by USB to the astrum1 laptop (atpnbg004.gsi.de, IP: 140.181.78.126).
The PicoScope Software is installed and can be run on this machine.
A VNC server can be used to allow remote usage of the PicoScope.

Start a VNC server:
> ssh litv-exp@atpnbg004.gsi.de
> vncserver :1
> exit

Access the VNC server by a local VNCviewer (tigerVNC):
> vncviewer atpnbg004.gsi.de:1

The control software (win10) ist linked here:
https://sf.gsi.de/f/c031d925ec844a2685a2/?dl=1

To use the ctrl binary for the vulom4 you need to find the binary in you trloii directory on the RIO4.
For 2020/21 E127 this is at
/esr/usr/litv-exp/2020_e127/trloii/trloctrl/fw_426cb99c_trlo/bin_ppc-linux_4.2.2/trlo_ctrl

An example for this DAQ is:

trlo_ctrl --addr=5 --mux-src-scalers (this shows the scaler rates for all vulom I/O)

The complete usage:
  --addr=HEX               Module address (HEX=dummy for dummy).
  --clear-setup            Set all setup to 0 (muxes to wired 0).
  --print-config[=debug]   Show configuration.
  --trig-status[=n]        Print trigger status.  (every n s.)
  --mux-src-scalers[=NAME,n,ptn,rate,limit=i,reset]
                           Dump all MUX source scalers, or per requested NAMEs.
                           Show currently active pattern (ptn, : or *).
                           Difference or (rate).  Every n s (default 1).
                           Limit to #i displays.  Reset scalers.
  --config=FILE            Load command file (to memory only).
  --call=SECTION           Execute SECTION from loaded configuration.
  --cmd="EXPR"             Execute EXPR as an command.
  --show[=setup,dest,src]  Show available setup parameters, etc.
  --tracer[=single]        Soft-scope for TRIG LMU inputs.
  --sampler=ecl-in-N|ecl-io-in-N|lemo-in-N
                           Multi-hit timer-latch (stop with Ctrl+C).
  --rec-mlatch=A,B,[diff]  Multi-hit timer-latch #A,#B,... record to stdout.
  --serial-stamp-rate      Test serial receiver rate. (Avoid with running DAQ).
  --debug[=N]              Debugging of tracer and sampler.
  --addrtest               Run VME test; address readback.
  --ramtest                Run VME test; RAM block write/read.
  --rawread:ADDROFF        Read from VULOM at given VME offset.
  --rawwrite:ADDROFF=VALUE Write to VULOM at given VME offset.

screen -S session-name -c config_file

screen -S e127 -p 0 -X stuff "^C"
screen -S e127 -p 0 -X stuff "sleep 2;./start.sh^M"
screen -S e127 -p 4 -X stuff "sleep 10; empty stream://r4l-58 --server=stream:6002^M"

stuff "^C"

stuff "top^M"

exec /usr/bin/ssh-agent xterm -g 100x20 -e "ssh-add; screen -S session-name -c config_file" &

#define R4L_58 ADDR(10, 99, 2, 39)

c_lmu_label[]

draw_header()

show_lmu()

show_lmu_line()

ser2net can be used to forward /dev/ttyUSBx or /dev/ttySx to a tcp port.
One can then use telnet for connecting.

The config has to be done in /etc/ser2net.conf

This is an example:
3333:telnet:0:/dev/ttyUSB1:9600 8DATABITS NONE 1STOPBIT

Here ttyUSB1 with the named options is forwarded to telnet port 3333 on the local machine.

You then need to start "/sbin/ser2net"
You can stop it by "sudo service ser2net stop"

This is realized on atpnuc006 now.

The vulom can be flashed via VME-bus from the RIO by using the binaries located here:
/nfs/groups/daq/usr/kurz/gsi_vme/flash/vulom/

There are subdirectories for several platforms, like
RIO4_Linux_2.6.33 (this is for our linux-RIOs)
RIO4_Linux_2.6
RIO4_Lynx
RIO3_...
IPV_...

IFC will follow soon...

The binaries needed for flashing are the following:

eraseflash <add> <slot>              
progflash  <add> <slot> <bitfile>
veriflash  <add> <slot> <bitfile>
restart    <add> <slot>

When invoked in the above order, things should work.
For 2.6.33 there are ALIASes:
vulom_erase
vulom_flash
vulom_verify
vulom_reset


The bitfiles for vulom4b are located here:

/nfs/groups/daq/usr/kurz/gsi_vme/flash/vulom/bitfiles/

Attached is the UI diagram of the new double-sided silicon strip detector (DSSD). [Micron W1, ID: 3305-9] 
It was taken during the internship of Emily Voigt and Rebanna Klawitter.

Conditons:
- DSSD in dark test chamber
- under atmosphere pressure
- no alpha source or similar

Analysis:
The current is roughly linear with voltage up to values of about 110-120V. After this point the current increases more slowly, kind of a plateau.
The comparison to an older measurement [https://elog.gsi.de/esr/E127/292] with another, identical DSSD is not fully understood. No plateau seems to reached in the range up to 150V. The currents are also significanlty higher.

Conclusion:
Save operation is possible up to 100V. 
Voltages above 100V should only be used in case of ion damage and related performance losses.

Detektor: Micron DSSD W1 ID: 3305-9
Start: 26.01.2023, 15.20
Stopp: 27.01.2023, 09.16
triple Alpha-Quelle
U_si = -100V
Daten: Lxg1275:/data.local2/2023_dssd_test/messung001.lmd

Detector: W1 3305-09 
Setup: 
- on vacuum (p=5e-5mbar)
- dark chamber
- triple alpha source

Daten: Lxg1275:/data.local2/2023_dssd_test/messung001.lmd

The resolution (sigma) is consistently below 0.5% for all strips.

dE/E = sigma/mean (root analysis)

strip dE/E
y1 0.0040
y2 0.0043
y3 0.0037
y4 0.0034
y5 0.0037
y6 0.0035
y7 0.0044
y8 0.0034
y9 0.0037
y10 0.0035
y11 0.0037
y12 0.0033
y13 0.0038
y14 0.0036
y15 0.0046
y16 0.0035

x1 0.0050
x2 0.0041
x3 0.0042
x4 0.0045
x5 0.0042
x6 0.0036
x7 0.0041
x8 0.0041
x9 0.0039
x10 0.0040
x11 0.0038
x12 0.0035
x13 0.0043
x14 0.0038
x15 0.0044
x16 0.0036

Attached is the UI diagram of the new double-sided silicon strip detector (DSSD). [Micron W1, ID: 3305-11] 

Conditons:
- DSSD in dark test chamber
- under atmosphere pressure
- no alpha source or similar

Analysis:
The current plateau extends up to about 80V. Beyond this point the current increases more rapidly with voltage.

Conclusion:
Operation between 70-80V is optimal.
Depletion voltage is 40V according to Micron.

Nik Kurz has setup an mbs-system for me to run with the new IFC, but it is also compatible to the RIO4 (and other VME CPUs).

The special thing about this setup is, that the VULOM priority encoder is exchanged the the VULOM trloii. Special care about the trloii-config needs to be taken.

To change the VME CPU one has to change 2 files and recompile.
1) setup.usf -> there are setup.usf.ifc and setup.usf.rioXX... the file used (setup.usf) needs to be overwritten by the one with the right extension
2) startup.scom -> same here, the used file (startup.scom) needs to be overwritten by the file with the right extension (startup.scom.ifc)
3) make clean; make


List of supported modules (18.07.2023):

MesyTec VMMR (untested)
MesyTec MDPP16 (tested)
MesyTec MADC32 (tested)
MesyTec MTDC32 (tested)

CAEN V775 TDC (tested)
CAEN V785 ADC (tested)
CAEN V830 Scaler (tested)

VULOM trloii (tested)
VULOM SCA32 (tested)

This entry refers to the MBS template from Nik Kurz found at /esr/usr/litv-exp/MBS/templates/2024_MBS_R2_R4_IFC_v1 or similar.

To find the right VME address for your modules, you need the (1) base address, (2) module space and (3) module offset. You simply add those three hex numbers to get the individual module address.

Example: 
V830[2] is the third V830 in this DAQ and has index 2. 
It has 
(1)=0x7000000 
(2)=0x400000 
(3)=0x20000. 

Added up this yields 
0x07440000

So you have to set 0x0744 on the module.

Details:

(1) the base is ususally 0x0700.0000. You only need the 4 hi bits, i.e. 0x0700. It can be readout in setup.usf, there is a line like this:
-------
LOC_MEM_BASE      = (0xe7000000, 0x0,        0x0,        0x0,-
-------

(2) the module space is the start address of the range foreseen for this kind of module in the template. It is defined in the f_used.c:
-------
#define ADDR_OFF_VMMR     0x10000
#define ADDR_OFF_MDPP     0x100000
#define ADDR_OFF_V775     0x200000
#define ADDR_OFF_V785     0x300000
#define ADDR_OFF_V830     0x400000
#define ADDR_OFF_MADC     0x500000
#define ADDR_OFF_MTDC     0x600000
#define ADDR_OFF_VUL_SCAL 0x1000000
-------

(3) the module offset is an incremental offset from the start address given to modules of higher index than 0. The second module of a type has index 1 and will get the offset once, while the first module 
does not get an offset. The offset along with the number of modules of a kind is defined in the f_user.c:
-------
#define N_VMMR         0
#define VMMR_OFF       0x20000

#define N_MDPP         0
#define MDPP_OFF       0x20000

#define N_V775         0
#define N_V775_CHA     32
#define V775_OFF       0x20000

#define N_V785         0
#define N_V785_CHA     32
#define V785_OFF       0x20000

#define N_V830         1
#define N_V830_CHA     32
#define V830_OFF       0x20000

#define N_MADC         0
#define N_MADC_CHA     32
#define MADC_OFF       0x20000

#define N_MTDC         0
#define N_MTDC_CHA     32
#define MTDC_OFF       0x20000

#define N_VUL_SCAL     0
#define N_VUL_SCAL_CHA 32
#define VUL_SCAL_OFF   0x1000000
-------

• to start MBS, always navigate to the folder containing the f_user.c setup for your hardware
  
• it is recommended to start MBS in a sceen session (see at the bottom)
  
• use MBS scripts to do initialitation "startup.scom", shutdown "shutdown.scom" or file writing "runstart.scom"/"runstop.scom" and other things
  these scripts are simple lists of MBS shell commands, one per row
  they should be in your MBS folder and can be created or adjusted as needed
  

> mbs  

> resl  

> rate

> ratf

[CTRL] + [Z]

mbs> @startup

mbs> sh(ow) ac(quisition)

mbs> sh(ow) f(ile)

mbs> t(ype) e(vent) {X} {-v}

[CTRL] + [Z]

mbs> co(nnect) rfio linuxpc.gsi.de -DISK 

mbs> disc(onnect) rfio 

mbs> op(en) f(ile) /path/to/storage/place/file.lmd -disk 

mbs> op(en) f(ile) /path/to/storage/place/file.lmd -rfio 

mbs> op(en) f(ile) file.lmd -rfio {-auto} 

mbs> op(en) f(ile) file.lmd -rfio {-auto} {first=Y} 

mbs> op(en) f(ile) file.lmd -rfio {-auto} {size=X} 

mbs> cl(ose) f(ile) 

mbs> 

mbs> 

mbs> 

mbs> 

mbs> 

mbs> 

[CTRL] + [Z]

Michael Reese and Nik Kurz implemented the SIS3820 scaler module in MBS to be used with RIO4, IFC and MVLC.

Attached is zipped folder for usage with RIO4/IFC (f_user.c, etc.). 

Below is the email by Michael with some explanation and the config needed to implement the module in MVME for use with the MVLC.

######################################################
############ EMAIL by M.Reese 02.10.2024 #############
######################################################

Hallo Jan,

Das SIS3820 Scaler Modul muss auf Adresse 0x08000000 eingedreht werden.

Das NIM-Signal, das die Scaler "latchen" soll, muss für alle Konfigurationen (RIO4/IFC/MVLC) in "input 1" rein. In dem 8er-LEMO-Block ist das der input unten links.

RIO/IFC
Die modifizierte f_user.c fuer SIS3820 readout mit RIO4 / IFC ist hier:
/daq/usr/mreese/mbsrun/rio4l_mesytec_MADC32_test/f_user.c

MVLC
Für MVLC habe ich zwei Readout-Varianten implementiert, du musst mal schauen welche besser für eure Anwendung passt. 

1) Readout über die "Shadow Register". Die latchen die Counter wenn auf "input 1" ein Signal kommt. Diesen Readout kann man entweder mit Blocktransfer oder mit Single Cycle machen. Im Single Cycle kannst du beliebige Subsets an Register wählen. Im Blocktransfer nur zusammenhängende Register. Hier liegen die Daten ab Adresse 0x800.

2) Readout über FIFO. Es gibt hier eine Bitmaske "copy disable register", über die man bestimmen kann welche Counter nicht in die FIFO geschrieben werden. Da es "copy disable" heißt, bedeutet '0' dass der Counter in die Daten kopiert wird. Die Daten werden aus Adresse 0x800000 gelesen, also andere Adresse als die Shadow Register. Hier muss man aufpassen, dass man beim Blocktransfer immer genau die korrekte Anzahl an Werten liest, die in der "copy disable" Maske eingestellt sind. Ansonsten wird der Readout (aus unbekannten Gründen) sehr langsam. Im Prinzip ist das der schnellste Modus, insbesondere wenn du ein nicht zusammenhängendes Subset von Kanälen im Blocktransfer lesen willst. Aber es ist leider etwas komplizierter.

Wenn du die beiden Textabschnitte unten kopierst wie sie sind, dann bekommst du Variante 2) "MULTI CHANNEL SCALER".
Um umzuschalten "LATCHING SCALER" musst du unter der Zeile "# configure the operation mode register" die Zeile mit "mode of operation 0" nehmen, und im Readout Loop eine der beiden unteren Varianten nehmen (die auf Adresse 0x800 lesen). 

Viele Grüsse,
Michael

----------------
MVME workspace:

event_3_hardware_trigger_type_1 -> Rechtsklick -> Add Module -> 


Type: UserModule_10  , Name: SIS3820 , Address : 0x08000000


---------------
Module Init:


# =====================================================================
# Reset the module
# =====================================================================
write a32 d32 0x400 0x1        # KEY_RESET 
write a32 d32 0x404 0x1        # KEY_SDRAM_FIFO_RESET
write a32 d32 0x000 0xffff0000 # clear all bits in Control/Status Register

# =====================================================================
# Setup for "LATCHING SCALER" mode
#  - disadvantage: this has no channel mask, i.e. only a conscutive cahnnels 
#                  can be read out in block mode (blt)
#                  if an arbitraty subset of channels is needed one has to 
#                  do single cycle readout
#
# or 
# 
# Setup for "MULTI CHANNEL SCALER" mode
#  - advantage: this mode allows to select a subset of channels using a mask register (0x104)
#  - disadvantage: this requires the high address space 0x800000
#
# In both modes, the input 1 on the front panel latches the scaler values
# In both modes, the input 3 in the front panel inhibits the counters (i.e. negative gate for the scalers operation)
# 
# Module front panel LEMO outputs / inputs for this configuration
# =====================================================================
# output 7 (10M) (L/M) output 8     L/M = copy of LNE input in Scaler Mode; Copy-to-SDRAM-in-progress in Multi channel Scaler mode
# output 5 ( * ) (10M) output 6     10M = 10 MHz output clock (20 ns pulse)
#  input 3 (InC) ( * ) input 4      InC = inhibit counting (counters stop countig if this is enabled (NIM-enabled = -0.7 V)
#  input 1 (LNE) ( * ) input 2      LNE = load next event (copies all 32 counters into shadow registers) 
# =====================================================================



                               # configure the operation mode register:
#write a32 d32 0x100 0x00220011 # [30:28] mode of operation 0 : "LATCHING SCALER" mode : counter data is copied to shadow registers on LNE (load next event)
write a32 d32 0x100 0x20220011 # [30:28] mode of operation 2 : "MULTI CHANNEL SCALER" mode : counter data is copied to SDRAM in FIFO emulation mode
                               # [21:20] output mode       2 : ouptut 5 -> LNE pulse , outputs 6+7 -> 10 MHz pulses
                               # [18:16] input mode        2 : input 1 -> external next pulse, input 3 -> inhibit counting 
                               # [13:12] select SDRAM mode 1 : SDRAM (instead of FIFO) allows to read data from address 0x800000 
                               # [ 6: 4] LNE (load next event) is taken from input 1 on front panel 
                               # [    0] celect non clearing mode 0: counters are NOT cleared at LNE

# =====================================================================
# Select the channels (only relevant for "MULTI CHANNEL SCALER" mode)
# USER MUST MAKE SURE THAT NUMBER OF ENABLED CHANNELS MATCHES
# THE NUMBER OF WORDS READ IN BLT READOUT AT ADDRESS 0x800000
# =====================================================================
write a32 d32 0x104 0x00000000 # disable no channels (i.e. copy all 32 channels to SDRAM). Readout should be "blt a32 0x800000 32"
#write a32 d32 0x104 0x0fffffff # disable 28 lower channels (i.e. copy 4 channels [31,30,29,28] to SDRAM). Readout should be "blt a32 0x800000 4"
#write a32 d32 0x104 0xffffffbb # disable all but channels 2 to 6. Readout should be "blt a32 0x800000 2"


# =====================================================================
# Enable the module. 
# Writing any value into this register starts the scaler operation.
# =====================================================================
write a32 d32 0x418 0x1        # KEY_OPERATION_ENABLE register: any write access starts scaler operation


----------------
Readout Loop:


# ==================================================================
# Readout for "MULTI CHANNEL SCALER" mode 
# 
# MAKE SURE THAT THE  NUMBER OF 32-BIT-WORDS MUST MATCH 
# THE SUM OF NON DISABLED BITS IN THE COPY DISABLE REGISTER (0x104) 
# IN MODULE INIT
# ==================================================================
blt a32 0x800000 32

# ==================================================================
# Block Transfer Readout for "LATCHING SCALER" mode
# Read shadow registers (latched counters) with block transfer
# The latching happens on LNE signal (front panel input 1)
# ==================================================================
#blt a32 0x800 32

# ==================================================================
# Single Cycle Readout for "LATCHING SCALER" mode
# Read shadow registers with single cycle
# ==================================================================
#read a32 d32 0x800 
#read a32 d32 0x804 
#read a32 d32 0x808 
#read a32 d32 0x80c 

#read a32 d32 0x810 
#read a32 d32 0x814 
#read a32 d32 0x818 
#read a32 d32 0x81c 

#read a32 d32 0x820 
#read a32 d32 0x824 
#read a32 d32 0x828 
#read a32 d32 0x82c 

#read a32 d32 0x830 
#read a32 d32 0x834 
#read a32 d32 0x838 
#read a32 d32 0x83c 

#read a32 d32 0x840 
#read a32 d32 0x844 
#read a32 d32 0x848 
#read a32 d32 0x84c 

#read a32 d32 0x850 
#read a32 d32 0x854 
#read a32 d32 0x858 
#read a32 d32 0x85c 

#read a32 d32 0x860 
#read a32 d32 0x864 
#read a32 d32 0x868 
#read a32 d32 0x86c 

#read a32 d32 0x870 
#read a32 d32 0x874 
#read a32 d32 0x878 
#read a32 d32 0x87c 

####################################
############ EMAIL END #############
####################################