/* CAEN V785 32 channel ADC*/
#include "stdio.h"
#include "s_veshe.h"
//----------------------------------------------
#define MWPC_downscale 0 // reduction = 2**MWPC_downscale
#define SI_downscale 0
#define VME_BASE 0x00000000
#define TB__OFFSET 0x05000000
#define TB__No_Ch 16
#define TB__No_Ch_enabled 16
#define TB__lmd_offset 0x300
#define ADC_V785__VME_OFFSET 0x00200000
#define ADC_V785__VME_SIZE 0x10000
#define ADC_V785__No_Ch 32
#define ADC_V785__lmd_offset 0x00
#define ADC_V785__No_Mod 3
#define SCA_V830_VME_OFFSET 0x00000000
#define SCA_V830_VME_SIZE 0x10000
#define SCA_V830__No_Ch 32
#define SCA_V830__lmd_offset 0x100
#define TDC_V1190a__OFFSET 0x01200000
#define TDC_V1190a__VME_SIZE 0x10000
#define TDC_V1190a__No_Ch 128
#define TDC_V1190a__No_hit_per_Ch 1 //only single hit allowed
#define TDC_V1190a__lmd_offset 0x200
#define TDC_V1190a__win_width 200
#define TDC_V1190a__win_offset -180
const long TB_Ch_enable_reg_F_0 = 0x00FF ;
//------------//
// scale down: ch00, ch01, ch02
const long TB_scale_down_0_F[TB__No_Ch] ={ SI_downscale,MWPC_downscale,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0} ;
const long ADC_threshold_value = 0x0000 ;
/*****************************************************************************/
/*
* all pointer wllhich are used for read/write operations in the functions
* f_user_init and f_user_readout must be defined here as static variables
*/
static long volatile *pl_VME_virtual_mem_base ;
static long volatile *pl_trig_vme_str; // triva status register
static long ll_evt_ctr = 0;
/* TB - Triggerbox on Vulom3 */
static long volatile *pl_TB__base ;
static long volatile *pl_TB__Ch_enable_reg_F_0 ;
static long volatile *pl_TB__scale_down_7_0 ;
static long volatile *pl_TB__scale_down_F_8 ;
static long volatile *pl_TB__latch_reg ;
static long volatile *pl_TB__version ;
static long volatile *pl_TB__scaler_inp [TB__No_Ch];
static long volatile *pl_TB__scaler_inhib [TB__No_Ch] ;
static long volatile *pl_TB__scaler_after_reduction [TB__No_Ch] ;
long TB__scaler_inp_old [TB__No_Ch] = { 0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0} ;
long TB__scaler_inhib_old [TB__No_Ch] = { 0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0} ;
long TB__scaler_after_reduction_old [TB__No_Ch] = { 0,0,0,0, 0,0,0,0, 0,0,0,0, 0,0,0,0} ;
/* ADC - Analog to Digital Converter CAEN V785AH */
static long volatile *pl_ADC_V785__base [ADC_V785__No_Mod];
static short volatile *ps_ADC_V785__firm_rev [ADC_V785__No_Mod];
static short volatile *ps_ADC_V785__geo_adr [ADC_V785__No_Mod];
static short volatile *ps_ADC_V785__oui_msb [ADC_V785__No_Mod] ;
static short volatile *ps_ADC_V785__oui [ADC_V785__No_Mod] ;
static short volatile *ps_ADC_V785__oui_lsb [ADC_V785__No_Mod] ;
static short volatile *ps_ADC_V785__version [ADC_V785__No_Mod] ;
static short volatile *ps_ADC_V785__board_id_msb [ADC_V785__No_Mod] ;
static short volatile *ps_ADC_V785__board_id [ADC_V785__No_Mod] ;
static short volatile *ps_ADC_V785__board_id_lsb [ADC_V785__No_Mod] ;
static short volatile *ps_ADC_V785__revision [ADC_V785__No_Mod] ;
static short volatile *ps_ADC_V785__serial_msb [ADC_V785__No_Mod];
static short volatile *ps_ADC_V785__serial_lsb [ADC_V785__No_Mod];
static long volatile *pl_ADC_V785__outp_buffer [ADC_V785__No_Mod];
static short volatile *ps_ADC_V785__bit_set_1 [ADC_V785__No_Mod];
static short volatile *ps_ADC_V785__bit_clr_1 [ADC_V785__No_Mod];
static short volatile *ps_ADC_V785__stat_reg_1 [ADC_V785__No_Mod];
static short volatile *ps_ADC_V785__ctrl_reg_1 [ADC_V785__No_Mod];
static short volatile *ps_ADC_V785__stat_reg_2 [ADC_V785__No_Mod];
static short volatile *ps_ADC_V785__bit_set_2 [ADC_V785__No_Mod];
static short volatile *ps_ADC_V785__bit_clr_2 [ADC_V785__No_Mod];
static short volatile *ps_ADC_V785__threshs[ADC_V785__No_Ch] [ADC_V785__No_Mod];
/* SCA - Scaler CAEN V830 */
static long volatile *pl_SCA_V830__base;
static long volatile *pl_SCA_V830__outp_buffer;
static long volatile *pl_SCA_V830__counter[SCA_V830__No_Ch];
static short volatile *ps_SCA_V830__scaler_clr;
static short volatile *ps_SCA_V830__scaler_status_reg;
static short volatile *ps_SCA_V830__fixed_code;
static short volatile *ps_SCA_V830__manuf_mod_type;
static short volatile *ps_SCA_V830__version_series;
static short volatile *ps_SCA_V830__firm_rev;
static short volatile *ps_SCA_V830__geo_adr;
static short volatile *ps_SCA_V830__oui_msb ;
static short volatile *ps_SCA_V830__oui ;
static short volatile *ps_SCA_V830__oui_lsb ;
static short volatile *ps_SCA_V830__version ;
static short volatile *ps_SCA_V830__board_id_msb ;
static short volatile *ps_SCA_V830__board_id ;
static short volatile *ps_SCA_V830__board_id_lsb ;
static short volatile *ps_SCA_V830__revision ;
static short volatile *ps_SCA_V830__serial_msb;
static short volatile *ps_SCA_V830__serial_lsb;
static short volatile *ps_SCA_V830__bit_set_1 ;
static short volatile *ps_SCA_V830__bit_clr_1 ;
static short volatile *ps_SCA_V830__stat_reg_1;
static short volatile *ps_SCA_V830__ctrl_reg_1;
static short volatile *ps_SCA_V830__sw_clr_reg ;
long SCA_V830__data_old [SCA_V830__No_Ch] ;
/* TDC - Time to Digital Converter CAEN V1190a */
static long volatile *pl_TDC_V1190a__base ;
static long volatile *pl_TDC_V1190a__outp_buffer ;
static short volatile *ps_TDC_V1190a__ctrl_reg_1 ;
static short volatile *ps_TDC_V1190a__stat_reg_1 ;
static short volatile *ps_TDC_V1190a__geo_adr ;
static short volatile *ps_TDC_V1190a__module_reset ;
static short volatile *ps_TDC_V1190a__sw_clr ;
static short volatile *ps_TDC_V1190a__sw_evt_reset ;
static short volatile *ps_TDC_V1190a__sw_trig ;
static short volatile *pl_TDC_V1190a__evt_cnt ;
static short volatile *ps_TDC_V1190a__firmware_rev ;
static short volatile *ps_TDC_V1190a__micro_reg ;
static short volatile *ps_TDC_V1190a__micro_hdshk_reg ;
static short volatile *ps_TDC_V1190a__oui_2 ;
static short volatile *ps_TDC_V1190a__oui_1 ;
static short volatile *ps_TDC_V1190a__oui_0 ;
static short volatile *ps_TDC_V1190a__board_ver ;
static short volatile *ps_TDC_V1190a__board_id_2 ;
static short volatile *ps_TDC_V1190a__board_id_1 ;
static short volatile *ps_TDC_V1190a__board_id_0 ;
static short volatile *ps_TDC_V1190a__revision_3 ;
static short volatile *ps_TDC_V1190a__revision_2 ;
static short volatile *ps_TDC_V1190a__revision_1 ;
static short volatile *ps_TDC_V1190a__revision_0 ;
static short volatile *ps_TDC_V1190a__serial_1 ;
static short volatile *ps_TDC_V1190a__serial_0 ;
int l_mod;
int l_ch;
long l_event_counter;
/*****************************************************************************/
/*****************************************************************************/
int f_user_get_virt_ptr (long *pl_loc_hwacc, long pl_rem_cam[])
{
int i;
long l_i, l_j;
/*
* create virtual pointer to be used in f_user_init and f_user_readout
*/
l_event_counter = 0;
//***************
// CAEN mapping
//***************
{ //#ifdef CAEN
pl_VME_virtual_mem_base = (long*) ((long)pl_loc_hwacc) ;
} //#endif // CAEN
// *****************************************************************************/
{
// * create virtual pointer to be used in f_user_init and f_user_readout
/*------------------------------------------------------------------------------*/
/* TB on VULOM3 */
/*------------------------------------------------------------------------------*/
{
pl_TB__base = (long*) ((long) pl_VME_virtual_mem_base + TB__OFFSET ) ;
pl_TB__Ch_enable_reg_F_0 = (long*) ( (long) pl_TB__base + 0x0000 );
pl_TB__scale_down_7_0 = (long*) ( (long) pl_TB__base + 0x0004 );
pl_TB__scale_down_F_8 = (long*) ( (long) pl_TB__base + 0x0008 ) ;
pl_TB__latch_reg = (long*) ( (long) pl_TB__base + 0x000c );
pl_TB__version = (long*) ( (long) pl_TB__base + 0x003c );
long l_ch ;
for (l_ch=0; l_ch<TB__No_Ch; l_ch++)
{ pl_TB__scaler_inp[l_ch] =
(long*) ( (long) pl_TB__base + 0x0040 +(l_ch*4));
pl_TB__scaler_inhib[l_ch] =
(long*) ( (long) pl_TB__base + 0x0080 +(l_ch*4));
pl_TB__scaler_after_reduction[l_ch] =
(long*) ( (long) pl_TB__base + 0x00c0 +(l_ch*4));
}
}
/*------------------------------------------------------------------------------*/
/* ADC CAEN 785AH */
/*------------------------------------------------------------------------------*/
for (l_mod = 0 ; l_mod < ADC_V785__No_Mod; l_mod++)
{
pl_ADC_V785__base[l_mod] = (long*) ( (long) pl_VME_virtual_mem_base + ADC_V785__VME_OFFSET + l_mod * ADC_V785__VME_SIZE) ;
ps_ADC_V785__firm_rev[l_mod] = (short*) ( (long) pl_ADC_V785__base[l_mod] + 0x1000 );
ps_ADC_V785__geo_adr[l_mod] = (short*) ( (long) pl_ADC_V785__base[l_mod] + 0x1002 );
ps_ADC_V785__oui_msb[l_mod] = (short*) ( (long) pl_ADC_V785__base[l_mod] + 0x8026 );
ps_ADC_V785__oui[l_mod] = (short*) ( (long) pl_ADC_V785__base[l_mod] + 0x802a );
ps_ADC_V785__oui_lsb[l_mod] = (short*) ( (long) pl_ADC_V785__base[l_mod] + 0x802e );
ps_ADC_V785__version[l_mod] = (short*) ( (long) pl_ADC_V785__base[l_mod] + 0x8032 );
ps_ADC_V785__board_id_msb[l_mod]= (short*) ( (long) pl_ADC_V785__base[l_mod] + 0x8036 );
ps_ADC_V785__board_id[l_mod] = (short*) ( (long) pl_ADC_V785__base[l_mod] + 0x802a );
ps_ADC_V785__board_id_lsb[l_mod]= (short*) ( (long) pl_ADC_V785__base[l_mod] + 0x802e );
ps_ADC_V785__revision[l_mod] = (short*) ( (long) pl_ADC_V785__base[l_mod] + 0x804e );
ps_ADC_V785__serial_msb[l_mod] = (short*) ( (long) pl_ADC_V785__base[l_mod] + 0x8f02 );
ps_ADC_V785__serial_lsb[l_mod] = (short*) ( (long) pl_ADC_V785__base[l_mod] + 0x8f06 );
pl_ADC_V785__outp_buffer[l_mod]= (long*) ( (long) pl_ADC_V785__base[l_mod] + 0x0000 );
ps_ADC_V785__bit_set_1[l_mod] = (short*) ( (long) pl_ADC_V785__base[l_mod] + 0x1006 );
ps_ADC_V785__bit_clr_1[l_mod] = (short*) ( (long) pl_ADC_V785__base[l_mod] + 0x1008 );
ps_ADC_V785__stat_reg_1[l_mod] = (short*) ( (long) pl_ADC_V785__base[l_mod] + 0x100e );
ps_ADC_V785__ctrl_reg_1[l_mod] = (short*) ( (long) pl_ADC_V785__base[l_mod] + 0x1010 );
ps_ADC_V785__stat_reg_2[l_mod] = (short*) ( (long) pl_ADC_V785__base[l_mod] + 0x1022 );
ps_ADC_V785__bit_set_2[l_mod] = (short*) ( (long) pl_ADC_V785__base[l_mod] + 0x1032 );
ps_ADC_V785__bit_clr_2[l_mod] = (short*) ( (long) pl_ADC_V785__base[l_mod] + 0x1034 );
for (l_ch=0; l_ch<ADC_V785__No_Ch; l_ch++)
{
ps_ADC_V785__threshs[l_ch][l_mod] = (short*) ( (long) pl_ADC_V785__base[l_mod] + 0x1080 + l_ch * 0x0002 );
}
}
/*------------------------------------------------------------------------------*/
/* Scaler CAEN V830 */
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